Issued Patents 2021
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211128 | Performing threshold voltage offset bin selection by package for memory devices | Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Larry J. Koudele | 2021-12-28 |
| 11210154 | Data-structure based dynamic program targeting control | Bruce A. Liikanen, Larry J. Koudele, James P. Crowley, Stuart A. Bell | 2021-12-28 |
| 11200956 | Read level calibration in memory devices using embedded servo cells | Larry J. Koudele, Bruce A. Liikanen | 2021-12-14 |
| 11189352 | Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution | Bruce A. Liikanen, Larry J. Koudele | 2021-11-30 |
| 11177006 | Memory system with dynamic calibration using a trim management mechanism | Larry J. Koudele, Steve Kientz | 2021-11-16 |
| 11120879 | Adjustment of a voltage corresponding to an erase distribution of a memory sub-system in accordance with a selected rule | Bruce A. Liikanen, Larry J. Koudele | 2021-09-14 |
| 11119848 | Logic based read sample offset in a memory sub system | Bruce A. Liikanen | 2021-09-14 |
| 11069416 | First-pass dynamic program targeting (DPT) | Larry J. Koudele, Bruce A. Liikanen | 2021-07-20 |
| 11061752 | Dynamic programming of page margins | Larry J. Koudele, Bruce A. Liikanen | 2021-07-13 |
| 11003383 | Estimation of read level thresholds using a data structure | Larry J. Koudele, Bruce A. Liikanen | 2021-05-11 |
| 10936246 | Dynamic background scan optimization in a memory sub-system | Gerald L. Cadloni, Francis Chew, Bruce A. Liikanen, Larry J. Koudele | 2021-03-02 |
| 10885975 | Dragging first pass read level thresholds based on changes in second pass read level thresholds | Larry J. Koudele, Bruce A. Liikanen | 2021-01-05 |