Issued Patents 2021
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211113 | Integrated assemblies comprising wordlines having ends selectively shunted to low voltage for speed transitioning | Scott J. Derner | 2021-12-28 |
| 11205468 | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory | Scott J. Derner | 2021-12-21 |
| 11200937 | Reprogrammable non-volatile ferroelectric latch for use with a memory controller | Scott J. Derner, Charles L. Ingalls | 2021-12-14 |
| 11176987 | Dram array architecture with row hammer stress mitigation | Charles L. Ingalls, Tae H. Kim | 2021-11-16 |
| 11176978 | Apparatuses and method for reducing row address to column address delay | — | 2021-11-16 |
| 11127450 | Pre-writing memory cells of an array | Scott J. Derner | 2021-09-21 |
| 11120847 | Apparatuses and method for reducing row address to column address delay for a voltage threshold compensation sense amplifier | Tae H. Kim | 2021-09-14 |
| 11107515 | Ferroelectric memory cells | Scott J. Derner | 2021-08-31 |
| 11074964 | Integrated assemblies comprising digit lines configured to have shunted ends during a precharge operation | Jiyun Li | 2021-07-27 |
| 11056165 | Cell-specific reference generation and sensing | Scott J. Derner | 2021-07-06 |
| 11017832 | Multi-level storage in ferroelectric memory | — | 2021-05-25 |
| 10998031 | Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory | Scott J. Derner | 2021-05-04 |
| 10978138 | Main word line driver circuit | Tae H. Kim | 2021-04-13 |
| 10950286 | Periphery fill and localized capacitance | Scott J. Derner | 2021-03-16 |
| 10910379 | Integrated assemblies comprising memory cells and shielding material between the memory cells, and methods of forming integrated assemblies | Sanh D. Tang, Mitsunari Sukekawa, Yusuke Yamamoto, Hiroaki Taketani | 2021-02-02 |
| 10910038 | DRAM array architecture with row hammer stress mitigation | Charles L. Ingalls, Tae H. Kim | 2021-02-02 |
| 10902899 | Apparatuses and method for reducing row address to column address delay | — | 2021-01-26 |
| 10896717 | Pseudo-non-volatile memory cells | Scott J. Derner | 2021-01-19 |
| 10885964 | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory | Scott J. Derner | 2021-01-05 |