Issued Patents 2021
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11171104 | IC chip package with dummy solder structure under corner, and related method | Manish Nayini, Richard S. Graf, Janak G. Patel | 2021-11-09 |
| 11054459 | Optimization of integrated circuit reliability | Carole D. Graas, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu +1 more | 2021-07-06 |
| 10996259 | Optimization of integrated circuit reliability | Carole D. Graas, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu +1 more | 2021-05-04 |
| 10989754 | Optimization of integrated circuit reliability | Carole D. Graas, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu +1 more | 2021-04-27 |