| 11195079 |
Reconfigurable neuro-synaptic cores for spiking neural network |
Huseyin Ekin Sumbul, Gregory K. Chen, Phil Knag, Raghavan Kumar |
2021-12-07 |
| 11157799 |
Neuromorphic circuits for storing and generating connectivity information |
Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar, Phil Knag |
2021-10-26 |
| 11151046 |
Programmable interface to in-memory cache processor |
Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen +4 more |
2021-10-19 |
| 11138499 |
Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits |
Abhishek A. Sharma, Jack T. Kavalieros, Ian A. Young, Sasikanth Manipatruni, Uygar E. Avci +7 more |
2021-10-05 |
| 11100385 |
Scalable free-running neuromorphic computer |
Raghavan Kumar, Gregory K. Chen, Huseyin Ekin Sumbul, Phil Knag |
2021-08-24 |
| 11061646 |
Compute in memory circuits with multi-Vdd arrays and/or analog multipliers |
Huseyin Ekin Sumbul, Phil Knag, Gregory K. Chen, Raghavan Kumar, Abhishek A. Sharma +3 more |
2021-07-13 |
| 11062203 |
Neuromorphic computer with reconfigurable memory mapping for various neural network topologies |
Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil Knag |
2021-07-13 |
| 11054470 |
Double edge triggered Mux-D scan flip-flop |
Amit Agarwal, Steven Hsu, Anupama A. Thaploo, Simeon Realov |
2021-07-06 |
| 11048434 |
Compute in memory circuits with time-to-digital computation |
Raghavan Kumar, Phil Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Sasikanth Manipatruni +3 more |
2021-06-29 |
| 11017288 |
Spike timing dependent plasticity in neuromorphic hardware |
Gregory K. Chen, Raghavan Kumar, Phil Knag, Huseyin Ekin Sumbul |
2021-05-25 |
| 11016701 |
Oscillator circuitry to facilitate in-memory computation |
Ian A. Young, Sasikanth Manipatruni, Amrita Mathuriya, Abhishek A. Sharma, Raghavan Kumar +3 more |
2021-05-25 |
| 11009549 |
Multibit vectored sequential with scan |
Amit Agarwal, Satish K. Damaraju, Steven Hsu, Simeon Realov |
2021-05-18 |
| 10956813 |
Compute-in-memory circuit having a multi-level read wire with isolated voltage distributions |
Ian A. Young, Sasikanth Manipatruni, Gregory K. Chen, Amrita Mathuriya, Abhishek A. Sharma +3 more |
2021-03-23 |
| 10884957 |
Pipeline circuit architecture to provide in-memory computation functionality |
Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Abhishek A. Sharma, Huseyin Ekin Sumbul +4 more |
2021-01-05 |