Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879246 | Methods of fabricating semiconductor devices having gate-all-around structure with oxygen blocking layers | Ziwei Fang | 2020-12-29 |
| 10868171 | Semiconductor device structure with gate dielectric layer and method for forming the same | Ziwei Fang | 2020-12-15 |
| 10818768 | Method for forming metal cap layers to improve performance of semiconductor structure | Ziwei Fang | 2020-10-27 |
| 10811253 | Methods of fabricating semiconductor devices having crystalline high-K gate dielectric layer | Ziwei Fang | 2020-10-20 |
| 10790196 | Threshold voltage tuning for fin-based integrated circuit device | Wei-Jen Chen, Yen-Yu Chen, Ming-Hsien Lin | 2020-09-29 |
| 10770563 | Gate structure and patterning method for multiple threshold voltages | Ziwei Fang | 2020-09-08 |
| 10763116 | Contact structure | Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Li-Hsuan Chu, Ethan Hsiao +6 more | 2020-09-01 |
| 10720431 | Methods of fabricating semiconductor devices having gate-all-around structure with oxygen blocking layers | Ziwei Fang | 2020-07-21 |
| 10679859 | Atomic layer deposition based process for contact barrier layer | YU-LIN LIU, Ming-Hsien Lin, Tzo-Hung Luo | 2020-06-09 |
| 10651292 | Dual metal via for contact resistance reduction | Yen-Yu Chen | 2020-05-12 |
| 10541175 | Structure and formation method of semiconductor device with fin structures | Ziwei Fang | 2020-01-21 |