Issued Patents 2020
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854260 | Adjustable current selectors | Gian Sharma, Amitay Levi | 2020-12-01 |
| 10852909 | User interface provision method and electronic device for supporting same | Seung Min Choi, Woon Geun Kwak, Jung Sik Park, Jung Hee Yeo, Yong Seok Lee +1 more | 2020-12-01 |
| 10847199 | MRAM array having reference cell structure and circuitry that reinforces reference states by induced magnetic field | Kadriye Deniz Bozdag, Eric Michael Ryan | 2020-11-24 |
| 10847198 | Memory system utilizing heterogeneous magnetic tunnel junction types in a single chip | Kadriye Deniz Bozdag, Eric Michael Ryan | 2020-11-24 |
| 10790333 | Flexible substrate for use with a perpendicular magnetic tunnel junction (PMTJ) | Marcin Gajek, Dafna Beery, Amitay Levi | 2020-09-29 |
| 10770561 | Methods of fabricating dual threshold voltage devices | Gian Sharma, Amitay Levi | 2020-09-08 |
| 10770510 | Dual threshold voltage devices having a first transistor and a second transistor | Gian Sharma, Amitay Levi | 2020-09-08 |
| 10686009 | High density MRAM integration | Dafna Beery, Marcin Gajek, Michail Tzoufras, Kadriye Deniz Bozdag, Eric Michael Ryan +2 more | 2020-06-16 |
| 10658425 | Methods of forming perpendicular magnetic tunnel junction memory cells having vertical channels | Dafna Beery, Amitay Levi, Andrew J. Walker | 2020-05-19 |
| 10629649 | Method of making a three dimensional perpendicular magnetic tunnel junction with thin-film transistor | Dafna Beery, Amitay Levi, Andrew J. Walker | 2020-04-21 |
| 10608047 | Magnetic memory element with voltage controlled magnetic anistropy | Marcin Gajek | 2020-03-31 |
| 10546625 | Method of optimizing write voltage based on error buffer occupancy | Neal Berger, Benjamin Louie, TaeJin Pyon | 2020-01-28 |