Issued Patents 2020
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10707163 | Logic cell including deep via contact and wiring layers located at different levels | Vincent Chun Fai Lau, Jung-Ho Do, Chul-Hong Park | 2020-07-07 |
| 10643857 | Method of generating layout and method of manufacturing semiconductor devices using same | In-Wook Oh, Dong Hyun Kim, Sung Keun Park, Ho Choi | 2020-05-05 |