Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10796993 | Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof | Jifeng Zhu, Jun Chen, Zhenyu Lu | 2020-10-06 |
| 10763158 | Method for forming lead wires in hybrid-bonded semiconductor devices | Meng Yan, Jifeng Zhu | 2020-09-01 |
| 10748851 | Hybrid bonding using dummy bonding contacts and dummy interconnects | Tao Wang, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen +1 more | 2020-08-18 |
| 10679941 | Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof | Jifeng Zhu, Jun Chen, Zhenyu Lu | 2020-06-09 |
| 10680003 | Staircase structure for memory device | Zhenyu Lu, Jun Chen, Xiaowang Dai, Jifeng Zhu, Qian Tao +6 more | 2020-06-09 |
| 10672711 | Word line contact structure for three-dimensional memory devices and fabrication methods thereof | Jifeng Zhu, Zhenyu Lu, Jun Chen, Xiaowang Dai, Lan Yao +4 more | 2020-06-02 |
| 10651087 | Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof | Jifeng Zhu, Jun Chen, Zhenyu Lu | 2020-05-12 |
| 10607887 | Method for forming three-dimensional integrated wiring structure and semiconductor structure thereof | Jifeng Zhu, Jun Chen, Zhenyu Lu | 2020-03-31 |
| 10580788 | Methods for forming three-dimensional memory devices | Jifeng Zhu, Jun Chen, Zhenyu Lu, Qian Tao, Jia Wen Wang +1 more | 2020-03-03 |