{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2020", "item": "https://www.patentleaderboard.com/2020/"}, {"@type": "ListItem", "position": 3, "name": "Intel", "item": "https://www.patentleaderboard.com/2020/company/intel"}, {"@type": "ListItem", "position": 4, "name": "Myra McDonnell", "item": "https://www.patentleaderboard.com/2020/inventor/fl:my_ln:mcdonnell-1"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MM

Myra McDonnell — 2 Patents in 2020

Intel: 2 patents #1,264 of 5,492Top 25%
Portland, OR: #546 of 1,857 inventorsTop 30%
Oregon: #1,082 of 4,557 inventorsTop 25%
Overall (2020): #137,902 of 565,922Top 25%
2 Patents 2020

Issued Patents 2020

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10720345 Wafer to wafer bonding with low wafer distortion Mauro J. Kobrinsky, Brennen Mueller, Chytra Pawashe, Daniel Pantuso, Paul B. Fischer +2 more 2020-07-21 $33,796,000
10707186 Compliant layer for wafer to wafer bonding Mauro J. Kobrinsky, Jasmeet S. Chawla, Stefan Meister, Chytra Pawashe, Daniel Pantuso 2020-07-07 $29,601,000