Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10705588 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Eliezer Weissmann, Ryan D. Wells | 2020-07-07 |
| 10678319 | Multi-level loops for computer processor control | Efraim Rotem, Eliezer Weissmann, Avinash N. Ananthakrishnan, Dorit Shapira | 2020-06-09 |
| 10613614 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Nadav Shulman, Alon Naveh +1 more | 2020-04-07 |
| 10564699 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Nadav Shulman, Alon Naveh +1 more | 2020-02-18 |