Issued Patents 2019
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522542 | Double rule integrated circuit layouts for a dual transmission gate | Shih-Wei Peng, Jiann-Tyng Tzeng, Li-Chun Tien, Pin-Dai Sue, Wei-Cheng Lin | 2019-12-31 |
| 10522527 | System and method of processing cutting layout and example switching circuit | Tung-Heng Hsieh, Chung-Te Lin, Sheng-Hsiung Wang, Ting-Wei Chiang, Li-Chun Tien | 2019-12-31 |
| 10504837 | Semiconductor device including a conductive feature over an active region | Tung-Heng Hsieh, Chung-Te Lin, Ting-Wei Chiang, Sheng-Hsiung Wang, Li-Chun Tien | 2019-12-10 |
| 10503863 | Integrated circuit and method of manufacturing same | Shih-Wei Peng, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng, Shun Li Chen +1 more | 2019-12-10 |
| 10446555 | Buried metal track and methods forming same | Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Jung-Chan Yang, Ru-Gun Liu +6 more | 2019-10-15 |
| 10380306 | Layout of standard cells for predetermined function in integrated circuits | Shang-Chih Hsieh, Ting-Wei Chiang, Chun-Fu Chen, Hsiang-Jen Tseng | 2019-08-13 |
| 10380315 | Integrated circuit and method of forming an integrated circuit | Ting-Wei Chiang, Lee-Chung Lu, Li-Chun Tien, Shun Li Chen | 2019-08-13 |
| 10331838 | Semiconductor device with fill cells | Jung-Chan Yang, Ting-Wei Chiang, Yun-Xiang Lin, Tien-Yu Kuo, Shu-Yi Ying | 2019-06-25 |
| 10325900 | Integrated circuit and method of fabricating the same | Chung-Te Lin, Ting-Wei Chiang, Pin-Dai Sue, Li-Chun Tien | 2019-06-18 |
| 10296694 | Integrated circuit and method of manufacturing same | Ting-Wei Chiang, Li-Chun Tien | 2019-05-21 |
| 10289789 | System for designing integrated circuit layout and method of making the integrated circuit layout | Shang-Chih Hsieh, Ting-Wei Chiang, Chun-Fu Chen, Hsiang-Jen Tseng | 2019-05-14 |
| 10277227 | Semiconductor device layout | Pin-Dai Sue, Ting-Wei Chiang, Li-Chun Tien, Shun Li Chen | 2019-04-30 |
| 10269784 | Integrated circuit layout and method of configuring the same | Chung-Te Lin, Ting-Wei Chiang, Pin-Dai Sue, Li-Chun Tien | 2019-04-23 |
| 10270432 | Flip-flop with delineated layout for reduced footprint | Chi-Lin Liu, Ting-Wei Chiang, Jerry Chang Jui Kao, Lee-Chung Lu, Shang-Chih Hsieh +1 more | 2019-04-23 |