Issued Patents 2019
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10483457 | Differential spin orbit torque magnetic random access memory (SOT-MRAM) cell structure and array | Hochul Lee, Chando Park | 2019-11-19 |
| 10460817 | Multiple (multi-) level cell (MLC) non-volatile (NV) memory (NVM) matrix circuits for performing matrix computations with multi-bit input vectors | Xia Li, Wei-Chuan Chen | 2019-10-29 |
| 10460785 | Parallel write scheme utilizing spin hall effect-assisted spin transfer torque random access memory | Hochul Lee, Chando Park | 2019-10-29 |
| 10460780 | Magneto-resistive random access memory (MRAM) employing an integrated physically unclonable function (PUF) memory | Sungryul Kim, Chando Park | 2019-10-29 |
| 10431278 | Dynamically controlling voltage for access operations to magneto-resistive random access memory (MRAM) bit cells to account for ambient temperature | Xia Li, Wah Nam Hsu, Wei-Chuan Chen | 2019-10-01 |
| 10431734 | Engineered barrier layer interface for high speed spin-transfer torque magnetic random access memory | Chando Park, Jimmy Jianan Kan, Peiyuan Wang | 2019-10-01 |
| 10424380 | Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells with added passive resistance to enhance transistor imbalance for improved PUF output reproducibility | Xia Li, Jianguo Yao | 2019-09-24 |
| 10410714 | Multi-level cell (MLC) static random access memory (SRAM) (MLC SRAM) cells configured to perform multiplication operations | Xia Li, Venkat Rangan, Rashid Ahmed Akbar Attar, Nicholas Ka Ming Stevens-Yu | 2019-09-10 |
| 10381060 | High-speed, low power spin-orbit torque (SOT) assisted spin-transfer torque magnetic random access memory (STT-MRAM) bit cell array | Jimmy Jianan Kan, Chando Park, Peiyuan Wang, Sungryul Kim | 2019-08-13 |
| 10347821 | Electrode structure for resistive memory device | Yu Lu, Junjing Bao, Xia Li | 2019-07-09 |
| 10340395 | Semiconductor variable capacitor using threshold implant region | Xia Li, Fabio Alessio Marino, Qingqing Liang, Francesco Carobolante | 2019-07-02 |
| 10319425 | Offset-cancellation sensing circuit (OCSC)-based non-volatile (NV) memory circuits | Seong-Ook Jung, Byungkyu Song, Sungryul Kim, Jung Pill Kim | 2019-06-11 |
| 10312244 | Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage | Xia Li, Bin Yang, Gengming Tao | 2019-06-04 |
| 10311930 | One-time programming (OTP) magneto-resistive random access memory (MRAM) bit cells in a physically unclonable function (PUF) memory in breakdown to a memory state from a previous read operation to provide PUF operations | Sungryul Kim, Chando Park | 2019-06-04 |
| 10290340 | Offset-canceling (OC) write operation sensing circuits for sensing switching in a magneto-resistive random access memory (MRAM) bit cell in an MRAM for a write operation | Seong-Ook Jung, Sara Choi, Hong Keun Ahn, Sungryul Kim | 2019-05-14 |
| 10263645 | Error correction and decoding | Seong-Ook Jung, Sara Choi, Byung Kyu Song, Taehui Na, Jisu Kim +3 more | 2019-04-16 |
| 10249814 | Dynamic memory protection | Chando Park, Sungryul Kim, Wei-Chuan Chen | 2019-04-02 |
| 10224087 | Sensing voltage based on a supply voltage applied to magneto-resistive random access memory (MRAM) bit cells in an MRAM for tracking write operations to the MRAM bit cells | Seong-Ook Jung, Sara Choi, Hong Keun Ahn, Sungryul Kim | 2019-03-05 |
| 10224368 | Voltage-switched magneto-resistive random access memory (MRAM) employing separate read operation circuit paths from a shared spin torque write operation circuit path | Xia Li, Jimmy Jianan Kan, Bin Yang, Gengming Tao | 2019-03-05 |
| 10210920 | Magnetic tunnel junction (MTJ) devices with varied breakdown voltages in different memory arrays fabricated in a same semiconductor die to facilitate different memory applications | Wei-Chuan Chen, Xia Li, Wah Nam Hsu | 2019-02-19 |