Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10388766 | Vertical transport FET (VFET) with dual top spacer | Shogo Mochizuki, Choonghyun Lee | 2019-08-20 |
| 10249730 | Controlling gate profile by inter-layer dielectric (ILD) nanolaminates | Andrew M. Greene, Fee Li Lie, Huimei Zhou | 2019-04-02 |
| 10170582 | Uniform bottom spacer for vertical field effect transistor | Cheng Chi, Ekmini Anuja De Silva, Tenko Yamashita | 2019-01-01 |