Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10366892 | Hybrid III-V technology to support multiple supply voltages and off state currents on same chip | Josephine B. Chang, Isaac Lauer, Amlan Majumdar | 2019-07-30 |
| 10361219 | Implementing a hybrid finFET device and nanowire device utilizing selective SGOI | Josephine B. Chang, Leland Chang, Isaac Lauer | 2019-07-23 |
| 10354960 | Support for long channel length nanowire transistors | Karthik Balakrishnan, Isaac Lauer, Tenko Yamashita | 2019-07-16 |
| 10170634 | Wire-last gate-all-around nanowire FET | Josephine B. Chang, Michael A. Guillorn, Isaac Lauer | 2019-01-01 |
| 10170679 | Josephson junction with spacer | Josephine B. Chang, Michael A. Guillorn, Ryan M. Martin | 2019-01-01 |