Issued Patents 2019
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10509576 | Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices | Inder M. Sodhi, Alon Naveh, Ryan D. Wells, Eric C. Samson | 2019-12-17 |
| 10474218 | Dynamically controlling cache size to maximize energy efficiency | Avinash N. Ananthakrishnan, Efraim Rotem, Eliezer Weissmann, Nadav Shulman, Alon Naveh +1 more | 2019-11-12 |
| 10474216 | Method and apparatus for providing power state information using in-band signaling | Dorit Shapira, Itai Feit, Nadav Shulman, Efraim Rotem, Tal Kuzi +3 more | 2019-11-12 |
| 10429919 | System, apparatus and method for loose lock-step redundancy power management | Efraim Rotem, Eliezer Weissmann, Nir Rosenzweig, Yoni Aizik | 2019-10-01 |
| 10423202 | System power management | Efraim Rotem, Tod F. Schiff, Jeffrey Jull, James G. Hermerding, II, Nir Rosenzweig +2 more | 2019-09-24 |
| 10394300 | Controlling operating voltage of a processor | Ryan D. Wells, Itai Feit, Nadav Shulman, Zeev Offen, Inder M. Sodhi | 2019-08-27 |
| 10379904 | Controlling a performance state of a processor using a combination of package and thread hint information | Eliezer Weissmann, Israel Hirsh, Efraim Rotem, Avinash N. Ananthakrishnan, Natanel Abitan +2 more | 2019-08-13 |
| 10372198 | Controlling performance states of processing engines of a processor | Eliezer Weissmann, Efraim Rotem, Hisham Abu Salah, Yoni Aizik, Nir Rosenzweig +3 more | 2019-08-06 |
| 10365707 | Instruction and logic for parallel multi-step power management flow | Alexander Gendler, Tal Kuzi, Dean Mulla, Ariel Szapiro, Nir Tell | 2019-07-30 |
| 10345889 | Forcing a processor into a low power state | Eliezer Weissmann, Yoni Aizik, Nir Rosenzweig, Efraim Rotem, Barnes Cooper +11 more | 2019-07-09 |
| 10324519 | Controlling forced idle state operation in a processor | Eliezer Weissmann, Efraim Rotem, Yoni Aizik, Gal Leibovich, Nadav Shulman +1 more | 2019-06-18 |
| 10281975 | Processor having accelerated user responsiveness in constrained environment | Efraim Rotem, Eliezer Weissmann, Nir Rosenzweig, Eric Distefano, Ishmael F. Santos +1 more | 2019-05-07 |
| 10248181 | Enabling a non-core domain to control memory bandwidth in a processor | Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Eliezer Weissmann, Ryan D. Wells | 2019-04-02 |
| 10228755 | Processor voltage control using running average value | Efraim Rotem, Avinash N. Ananthakrishnan, Ankush Varma, Assaf Ganor, Nir Rosenzweig +3 more | 2019-03-12 |
| 10222851 | System maximum current protection | Efraim Rotem, Nir Rosenzweig, Nadav Shulman, Gal Leibovich, Tomer Ziv +3 more | 2019-03-05 |
| 10216246 | Multi-level loops for computer processor control | Efraim Rotem, Eliezer Weissmann, Avinash N. Ananthakrishnan, Dorit Shapira | 2019-02-26 |