IS

Inder M. Sodhi

IN Intel: 8 patents #269 of 5,769Top 5%
Apple: 4 patents #624 of 4,359Top 15%
📍 Palo Alto, CA: #36 of 2,240 inventorsTop 2%
🗺 California: #936 of 67,890 inventorsTop 2%
Overall (2019): #6,183 of 560,194Top 2%
12
Patents 2019

Issued Patents 2019

Showing 1–12 of 12 patents

Patent #TitleCo-InventorsDate
10509576 Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices Alon Naveh, Doron Rajwan, Ryan D. Wells, Eric C. Samson 2019-12-17
10503517 Method for booting a heterogeneous system and presenting a symmetric core view Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more 2019-12-10
10429913 Controlling power delivery to a processor via a bypass Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Vishram Sarurkar +3 more 2019-10-01
10423209 Systems and methods for coherent power management Joseph T. DiBene, II, Keith Cox, Gerard R. Williams, III 2019-09-24
10409346 Controlling power delivery to a processor via a bypass Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Vishram Sarurkar +3 more 2019-09-10
10394564 Local closed loop efficiency control using IP metrics Sanjeev Jahagirdar 2019-08-27
10394300 Controlling operating voltage of a processor Ryan D. Wells, Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen 2019-08-27
10346328 Method and apparatus for indicating interrupts James D. Ramsay 2019-07-09
10281965 Reduced power operation using stored capacitor energy Joseph T. DiBene, II, Gerard R. Williams, III 2019-05-07
10248181 Enabling a non-core domain to control memory bandwidth in a processor Avinash N. Ananthakrishnan, Efraim Rotem, Doron Rajwan, Eliezer Weissmann, Ryan D. Wells 2019-04-02
10228861 Common platform for one-level memory architecture and two-level memory architecture Joydeep Ray, Varghese George, Jeffrey R. Wilcox 2019-03-12
10209767 Power management architecture Joseph T. DiBene, II, David A. Hartley 2019-02-19