Issued Patents 2019
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10515135 | Data format suitable for fast massively parallel general matrix multiplication in a programmable IC | Jindrich Zejda, Elliott Delaye, Aaron Ng, Yongjun Wu | 2019-12-24 |
| 10460416 | Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit | Elliott Delaye, Aaron Ng, Ehsan Ghasemi | 2019-10-29 |
| 10430539 | Method and apparatus for enhancing performance by moving or adding a pipelined register stage in a cascaded chain | Chaithanya Dudha, Zhao Ma, Krishna Garlapati | 2019-10-01 |
| 10411709 | Circuit arrangements and methods for dividing a three-dimensional input feature map | Ehsan Ghasemi, Elliott Delaye | 2019-09-10 |
| 10354733 | Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable IC | Jindrich Zejda, Elliott Delaye, Yongjun Wu, Aaron Ng | 2019-07-16 |
| 10331836 | Loop optimization for implementing circuit designs in hardware | Anup Hosangadi, Sumanta Datta, Aman Gayasen | 2019-06-25 |
| 10303833 | Parallelizing timing-based operations for circuit designs | Aman Gayasen, Surya Pratik Saha, Elliott Delaye, Shangzhi Sun | 2019-05-28 |
| 10289786 | Circuit design transformation for automatic latency reduction | Chaithanya Dudha, Shangzhi Sun, Nithin Kumar Guggilla | 2019-05-14 |