Issued Patents 2019
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10496522 | Virtualizing precise event based sampling | Matthew C. Merten, Beeman C. Strong, Michael W. Chynoweth, Grant G. Zhou, Andreas Kleen +5 more | 2019-12-03 |
| 10496573 | Context-sensitive interrupts | Steffen Schulz, Patrick Koeberl, Vedvyas Shanbhogue, Venkateswara Madduri, Sang W. Kim +1 more | 2019-12-03 |
| 10445494 | Attack protection for valid gadget control transfers | Vedvyas Shanbhogue, Ravi L. Sahita, Yuriy Bulygin, Xiaoning Li | 2019-10-15 |
| 10430580 | Processor extensions to protect stacks during ring transitions | Vedvyas Shanbhogue, Ravi L. Sahita, Barry E. Huntley, Baiju V. Patel, Deepak Gupta | 2019-10-01 |
| 10394556 | Hardware apparatuses and methods to switch shadow stack pointers | Vedvyas Shanbhogue, Ravi L. Sahita, Barry E. Huntley, Baiju V. Patel, Deepak Gupta | 2019-08-27 |
| 10372197 | User level control of power management policies | Krishnakanth V. Sistla, Jeremy J. Shrall, Stephen H. Gunther, Efraim Rotem, Alon Naveh +7 more | 2019-08-06 |
| 10365988 | Monitoring performance of a processing device to manage non-precise events | Jonathan D. Combs, Michael W. Chynoweth, Corey D. Gough | 2019-07-30 |
| 10346280 | Monitoring performance of a processor using reloadable performance counters | — | 2019-07-09 |
| 10346167 | Apparatuses and methods for generating a suppressed address trace | Toby Opferman, James B. Crossland, Beeman C. Strong | 2019-07-09 |
| 10313129 | Keyed-hash message authentication code processors, methods, systems, and instructions | Vinodh Gopal | 2019-06-04 |
| 10303620 | Maintaining processor resources during architectural events | Sanjoy K. Mondal, Richard Uhlig, Gilbert Neiger, Robert T. George | 2019-05-28 |
| 10282296 | Zeroing a cache line | Robert S. Chappell, Jesus Corbal, Edward T. Grochowski, Stephen H. Gunther, Buford M. Guy +5 more | 2019-05-07 |
| 10275242 | System and method for real time instruction tracing | Huy V. Nguyen, Jonathan J. Tyler | 2019-04-30 |
| 10262162 | Control transfer termination instructions of an instruction set architecture (ISA) | Vedvyas Shanbhogue, Uday Savagaonkar, Ravi L. Sahita | 2019-04-16 |
| 10255072 | Architectural register replacement for instructions that use multiple architectural registers | Mark J. Charney, Robert Valentine, Milind B. Girkar, Ashish Jha, Bret L. Toll +2 more | 2019-04-09 |
| 10175990 | Gathering and scattering multiple data elements | Christopher J. Hughes, Yen-Kuang Chen, Mayank Bomb, Mark Buxton, Mark J. Charney +13 more | 2019-01-08 |