Issued Patents 2019
Showing 25 most recent of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521876 | Deferred geometry rasterization technology | Louis Feng, Tomasz Janczak, Andrew T. Lauritzen, David M. Cimini | 2019-12-31 |
| 10522114 | Programmable controller and command cache for graphics processors | Jeffery S. Boles, Hema Chand Nalluri, Balaji Vembu, Michael Apodaca, Lalit K. Saptarshi | 2019-12-31 |
| 10521271 | Hybrid low power homogenous grapics processing units | Abhishek R. Appu, Balaji Vembu, Joydeep Ray, Kamal Sinha, Prasoonkumar Surti +16 more | 2019-12-31 |
| 10521880 | Adaptive compute size per workload | Balaji Vembu, Josh B. Mastronarde, Nikos Kaburlasos, Abhishek R. Appu, Joydeep Ray | 2019-12-31 |
| 10521875 | Thread scheduling over compute blocks for power optimization | Balaji Vembu, Joydeep Ray, James Valerio, Abhishek R. Appu | 2019-12-31 |
| 10521349 | Extend GPU/CPU coherency to multi-GPU cores | Chandrasekaran Sakthivel, Prasoonkumar Surti, John C. Weast, Sara S. Baghsorkhi, Justin E. Gottschlich +11 more | 2019-12-31 |
| 10503652 | Sector cache for compression | Abhishek R. Appu, Joydeep Ray, David Puffer, Prasoonkumar Surti, Lakshminarayanan Striramassarma +4 more | 2019-12-10 |
| 10496448 | De-centralized load-balancing at processors | Prasoonkumar Surti, David J. Cowperthwaite, Abhishek R. Appu, Joydeep Ray, Vasanth Ranganathan +1 more | 2019-12-03 |
| 10497084 | Efficient sharing and compression expansion of data across processing systems | Abhishek R. Appu, John C. Weast, Mike B. Macpherson, Dukhwan Kim, Linda L. Hurd +5 more | 2019-12-03 |
| 10497087 | Handling pipeline submissions across many compute units | Balaji Vembu, Joydeep Ray | 2019-12-03 |
| 10496697 | Recognition, reidentification and security enhancements using autonomous machines | Barnan Das, Mayuresh M. Varerkar, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir +11 more | 2019-12-03 |
| 10496563 | Apparatus and method for dynamic provisioning, quality of service, and scheduling in a graphics processor | Balaji Vembu, Joydeep Ray, Abhishek R. Appu, Pattabhiraman K, Niranjan L. Cooray | 2019-12-03 |
| 10490170 | Adaptive multibit bus for energy optimization | Sanjeev Jahagirdar, Tapan A. Ganpule, Anupama A. Thaploo, Abhishek R. Appu, Joydeep Ray | 2019-11-26 |
| 10489877 | Compute optimization mechanism | Abhishek R. Appu, Linda L. Hurd, Dukhwan Kim, Mike B. Macpherson, John C. Weast +10 more | 2019-11-26 |
| 10482562 | Graphics engine partitioning mechanism | Abhishek R. Appu, Balaji Vembu, Bryan R. White, David J. Cowperthwaite, Joydeep Ray +1 more | 2019-11-19 |
| 10482028 | Cache optimization for graphics systems | Balaji Vembu, Joydeep Ray, Abhishek R. Appu | 2019-11-19 |
| 10474458 | Instructions and logic to perform floating-point and integer operations for machine learning | Himanshu Kaul, Mark A. Anders, Sanu K. Mathew, Anbang Yao, Joydeep Ray +13 more | 2019-11-12 |
| 10460476 | Fabric-based compression/decompression for internal data transfer | Vasanth Ranganathan, Joydeep Ray, Abhishek R. Appu | 2019-10-29 |
| 10459509 | Dual path sequential element to reduce toggles in data path | Subramaniam Maiyuran, Sanjeev Jahagirdar, Kiran C. Veernapu, Eric J. Asperheim, Balaji Vembu +2 more | 2019-10-29 |
| 10460417 | Compute cluster preemption within a general-purpose graphics processing unit | Murali Ramadoss, Balaji Vembu, Eric C. Samson, Kun Tian, David J. Cowperthwaite +4 more | 2019-10-29 |
| 10452397 | Efficient multi-context thread distribution | Joydeep Ray, Balaji Vembu, Abhishek R. Appu, Kamal Sinha, Prasoonkumar Surti +1 more | 2019-10-22 |
| 10452552 | Memory-based dependency tracking and cache pre-fetch hardware for multi-resolution shading | Andrew T. Lauritzen, Gabor Liktor, Tomer Bar-On, Hugues Labbe, John G. Gierach +7 more | 2019-10-22 |
| 10453427 | Register spill/fill using shared local memory space | Joydeep Ray, Balaji Vembu, Murali Ramadoss, Guei-Yuan Lueh, James Valerio +7 more | 2019-10-22 |
| 10452586 | Avoid thread switching in cache management | Abhishek R. Appu, Joydeep Ray, Kiran C. Veernapu, Balaji Vembu, Vasanth Ranganathan +1 more | 2019-10-22 |
| 10444817 | System, apparatus and method for increasing performance in a processor during a voltage ramp | Abhishek R. Appu, Bhushan M. Borole, Wenyin Fu, Kamal Sinha, Joydeep Ray | 2019-10-15 |