Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521271 | Hybrid low power homogenous grapics processing units | Abhishek R. Appu, Altug Koker, Balaji Vembu, Joydeep Ray, Kamal Sinha +16 more | 2019-12-31 |
| 10453427 | Register spill/fill using shared local memory space | Joydeep Ray, Altug Koker, Balaji Vembu, Murali Ramadoss, James Valerio +7 more | 2019-10-22 |
| 10430229 | Multiple-patch SIMD dispatch mode for domain shaders | Jayashree Venkatesh, Subramaniam Maiyuran | 2019-10-01 |
| 10423415 | Hierarchical general register file (GRF) for execution block | Abhishek R. Appu, Altug Koker, Joydeep Ray, Kamal Sinha, Kiran C. Veernapu +7 more | 2019-09-24 |
| 10373288 | Transpose of image data between a linear and a Y-tiled storage format | Yuting Yang, Lei Shen, John R. Hartwig, Kin-Hang Cheung | 2019-08-06 |
| 10360654 | Software scoreboard information and synchronization | Subramaniam Maiyuran, Supratim Pal, Jorge Parra, Chandra Gurram, Ashwin J. Shivani +9 more | 2019-07-23 |
| 10318292 | Hardware instruction set to replace a plurality of atomic operations with a single atomic operation | Satyajit Sarangi, Thomas Raoux, Subramaniam Maiyuran | 2019-06-11 |
| 10282812 | Page faulting and selective preemption | Altug Koker, Ingo Wald, David Puffer, Subramaniam Maiyuran, Prasoonkumar Surti +4 more | 2019-05-07 |
| 10282227 | Efficient preemption for graphics processors | Subramaniam Maiyuran, Wei-Yu Chen, Kaiyu Chen | 2019-05-07 |
| 10235736 | Intelligent graphics dispatching mechanism | Balaji Vembu, Murali Ramadoss, Subramaniam Maiyuran, Abhishek R. Appu, Joydeep Ray +4 more | 2019-03-19 |
| 10191724 | Compiler-based instruction scoreboarding | Bu Qi Cheng, Wei-Yu Chen | 2019-01-29 |