| 10437729 |
Non-disruptive clearing of varying address ranges from cache |
Ekaterina M. Ambroladze, Michael A. Blake, Pak-kin Mak, Robert J. Sonnelitter, III, Guy G. Tracy +1 more |
2019-10-08 |
| 10402328 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2019-09-03 |
| 10394712 |
Configuration based cache coherency protocol selection |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2019-08-27 |
| 10379776 |
Operation interlocking in an address-sliced cache system |
Michael A. Blake, Ashraf ElSharif, Kenneth D. Klapproth, Pak-kin Mak, Robert J. Sonnelitter, III +1 more |
2019-08-13 |
| 10310982 |
Target cache line arbitration within a processor cluster |
Johnathon J. Hoste, Pak-kin Mak, Arthur J. O'Neill, Robert J. Sonnelitter, III |
2019-06-04 |
| 10176013 |
Dual/multi-mode processor pipeline sampling |
Kathryn Marie Jackson, Joshua D. Massover, Gary E. Strait, Hanno Ulrich, Craig R. Walters |
2019-01-08 |
| 10169260 |
Multiprocessor cache buffer management |
Ekaterina M. Ambroladze, Michael Fee, Arthur J. O'Neill |
2019-01-01 |
