SR

Shay Reboh

CEA: 9 patents #2 of 857Top 1%
IBM: 1 patents #5,496 of 11,143Top 50%
📍 Grenoble, NY: #1 of 5 inventorsTop 20%
Overall (2019): #10,086 of 560,194Top 2%
9
Patents 2019

Issued Patents 2019

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
10431683 Method for making a semiconductor device with a compressive stressed channel Emmanuel Augendre, Remi Coquand, Nicolas Loubet 2019-10-01
10347721 Method to increase strain in a semiconductor region for forming a channel of the transistor Laurent Grenouillet, Raluca Tiron 2019-07-09
10269930 Method for producing a semiconductor device with self-aligned internal spacers Emmanuel Augendre, Remi Coquand 2019-04-23
10263077 Method of fabricating a FET transistor having a strained channel Remi Coquand 2019-04-16
10256102 Method for fabricating a field effect transistor having a surrounding grid Remi Coquand, Emmanuel Augendre 2019-04-09
10217849 Method for making a semiconductor device with nanowire and aligned external and internal spacers Sylvain Barraud, Emmanuel Augendre, Remi Coquand 2019-02-26
10217842 Method for making a semiconductor device with self-aligned inner spacers Emmanuel Augendre, Remi Coquand 2019-02-26
10205021 Method of fabrication of a semiconductor substrate having at least a tensilely strained semiconductor portion 2019-02-12
10170621 Method of making a transistor having a source and a drain obtained by recrystallization of semiconductor Perrine Batude, Flavia PIEGAS LUCE 2019-01-01