LG

Laurent Grenouillet

CEA: 5 patents #11 of 857Top 2%
UD Université D'Aix-Marseille: 1 patents #9 of 98Top 10%
📍 Grenoble, NY: #2 of 5 inventorsTop 40%
Overall (2019): #33,415 of 560,194Top 6%
5
Patents 2019

Issued Patents 2019

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
10453960 Transistor having structured source and drain regions and production method thereof Vincent Mazzocchi 2019-10-22
10446564 Non-volatile memory allowing a high integration density Jean-Michel PORTAL, Marios Barlas, Elisa VIANELLO 2019-10-15
10347545 Method for producing on the same transistors substrate having different characteristics Sebastien Barnola, Marie-Anne Jaud, Jerome Mazurier, Nicolas Posseme 2019-07-09
10347721 Method to increase strain in a semiconductor region for forming a channel of the transistor Shay Reboh, Raluca Tiron 2019-07-09
10290667 Front-illuminated photosensitive logic cell Olivier Rozeau 2019-05-14