Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10497627 | Method of manufacturing a dopant transistor located vertically on the gate | Nicolas Posseme, Laurent Brunet | 2019-12-03 |
| 10319628 | Integrated circuit having a plurality of active layers and method of fabricating the same | Fabien Deprat, Laurent Brunet, Claire Fenouillet-Beranger, Maud Vinet | 2019-06-11 |
| 10170621 | Method of making a transistor having a source and a drain obtained by recrystallization of semiconductor | Shay Reboh, Flavia PIEGAS LUCE | 2019-01-01 |