SS

Saibal Saha

CS Cadence Design Systems: 4 patents #15 of 394Top 4%
📍 Cupertino, CA: #172 of 1,624 inventorsTop 15%
🗺 California: #6,166 of 67,890 inventorsTop 10%
Overall (2019): #44,676 of 560,194Top 8%
4
Patents 2019

Issued Patents 2019

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
10303828 Integrated circuit simulation with efficient memory usage Jaideep Mukherjee, Jianyu Li, Yishan Wang, Walter J. Ghijsen 2019-05-28
10248745 Integrated circuit simulation with variability analysis for efficient memory usage Jaideep Mukherjee, Jianyu Li, Yishan Wang, Walter J. Ghijsen 2019-04-02
10248747 Integrated circuit simulation with data persistency for efficient memory usage Jaideep Mukherjee, Jianyu Li, Yishan Wang, Walter J. Ghijsen 2019-04-02
10223484 Spice model bin inheritance mechanism Donald J. O'Riordan, Richard J. O'Donovan, Jushan Xie 2019-03-05