JL

Jianyu Li

CS Cadence Design Systems: 3 patents #23 of 394Top 6%
BC Beijing Tonglanhai Technology Co.: 2 patents #1 of 2Top 50%
Overall (2019): #34,899 of 560,194Top 7%
5
Patents 2019

Issued Patents 2019

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
D868294 3D wall panel Yue Ma 2019-11-26
D867622 3D wall panel Yue Ma 2019-11-19
10303828 Integrated circuit simulation with efficient memory usage Jaideep Mukherjee, Saibal Saha, Yishan Wang, Walter J. Ghijsen 2019-05-28
10248745 Integrated circuit simulation with variability analysis for efficient memory usage Jaideep Mukherjee, Saibal Saha, Yishan Wang, Walter J. Ghijsen 2019-04-02
10248747 Integrated circuit simulation with data persistency for efficient memory usage Jaideep Mukherjee, Saibal Saha, Yishan Wang, Walter J. Ghijsen 2019-04-02