Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10141222 | Semiconductor device and method of forming conductive vias through interconnect structures and encapsulant of WLCSP | Yaojian Lin | 2018-11-27 |
| 10115672 | Double-sided semiconductor package and dual-mold method of making same | Il Kwon Shim, Yaojian Lin | 2018-10-30 |
| 10115701 | Semiconductor device and method of forming conductive vias by backside via reveal with CMP | Xing Zhao, Duk Ju Na, Siew Joo Tan | 2018-10-30 |
| 10049964 | Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units | Il Kwon Shim, Yaojian Lin, Kang Chen, Yu Gu | 2018-08-14 |
| 9978665 | Semiconductor device and method of forming low profile fan-out package with vertical interconnection units | Il Kwon Shim, Yaojian Lin, Won Kyoung Choi | 2018-05-22 |
| 9893017 | Double-sided semiconductor package and dual-mold method of making same | Il Kwon Shim, Yaojian Lin | 2018-02-13 |
| 9865524 | Semiconductor device and method of forming conductive vias using backside via reveal and selective passivation | Duk Ju Na, Chang Beom Yong | 2018-01-09 |
| 9865525 | Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units | Yaojian Lin, Kang Chen, Yu Gu | 2018-01-09 |