Issued Patents 2018
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10128251 | Semiconductor integrated circuit structure and method for forming the same | Yu-Ting Li, Jen-Chieh Lin, Wen-Chin Lin, Po-Cheng Huang | 2018-11-13 |
| 10103034 | Method of planarizing substrate surface | Li-Chieh Hsu, Yu-Ting Li, Yi-Liang Liu, Kun-Ju Li | 2018-10-16 |
| 10049887 | Method of planarizing substrate surface | Li-Chieh Hsu, Yu-Ting Li, Yi-Liang Liu, Kun-Ju Li | 2018-08-14 |
| 9972498 | Method of fabricating a gate cap layer | Yu-Ting Li, Chih-Hsun Lin, Li-Chieh Hsu, Yi-Liang Liu, Po-Cheng Huang +2 more | 2018-05-15 |
| 9905430 | Method for forming semiconductor structure | Yu-Ting Li, Li-Chieh Hsu, Yi-Liang Liu, Kun-Ju Li, Po-Cheng Huang +1 more | 2018-02-27 |
| 9887158 | Conductive structure having an entrenched high resistive layer | Kun-Ju Li, Kuo-Chin Hung, Min-Chuan Tsai, Wei-Chuan Tsai, Yi-Han Liao +2 more | 2018-02-06 |
| 9875909 | Method for planarizing material layer | Yu-Ting Li, Li-Chieh Hsu, Yi-Liang Liu, Kun-Ju Li, Po-Cheng Huang +1 more | 2018-01-23 |