Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10162761 | Apparatus and method for system physical address to memory module address translation | Ashok Raj, Sarathy Jayakumar, Mohan J. Kumar, Theodros Yigzaw, Ronald N. Story | 2018-12-25 |
| 10102886 | Techniques for probabilistic dynamic random access memory row repair | John H. Crawford, Brian S. Morris, Raj K. Ramanujan | 2018-10-16 |
| 10042562 | Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device | Vedaraman Geetha, Henk G. Neefs, Brian S. Morris, Massimo Sutera | 2018-08-07 |