Issued Patents 2018
Showing 51–58 of 58 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9887197 | Structure containing first and second vertically stacked nanosheets having different crystallographic orientations | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-02-06 |
| 9876015 | Tight pitch inverter using vertical transistors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-23 |
| 9875896 | Method for forming a strained semiconductor layer including replacing an etchable material formed under the strained semiconductor layer with a dielectric layer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-23 |
| 9871140 | Dual strained nanosheet CMOS and methods for fabricating | Michael A. Guillorn, Pouya Hashemi, Alexander Reznicek | 2018-01-16 |
| 9865462 | Strain relaxed buffer layers with virtually defect free regions | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-09 |
| 9859371 | Semiconductor device including a strain relief buffer | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-02 |
| 9859420 | Tapered vertical FET having III-V channel | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-02 |
| 9859301 | Methods for forming hybrid vertical transistors | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-01-02 |