DG

Dan F. Greiner

IBM: 28 patents #96 of 10,623Top 1%
📍 San Jose, CA: #15 of 5,991 inventorsTop 1%
🗺 California: #121 of 60,411 inventorsTop 1%
Overall (2018): #718 of 503,207Top 1%
28
Patents 2018

Issued Patents 2018

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDate
10152307 Specifying user defined or translator definitions to use to interpret mnemonics in a computer program John Robert Dravnieks, John R. Ehrman 2018-12-11
10133575 Instruction for performing a pseudorandom number generate operation Bernd Nerz, Tamas Visegrady 2018-11-20
10120681 Compare and delay instructions Charles W. Gainey, Jr., Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel 2018-11-06
10089111 Performing an operation absent host intervention Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III 2018-10-02
10078585 Creating a dynamic address translation with translation exception qualifiers Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer 2018-09-18
10061585 Instruction for performing a pseudorandom number generate operation Bernd Nerz, Tamas Visegrady 2018-08-28
10025589 Conditional transaction end instruction Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel 2018-07-17
9996355 Parsing-enhancement facility John R. Ehrman 2018-06-12
9996472 Extract target cache attribute facility and instruction therefor Timothy Siegel 2018-06-12
9996360 Transaction abort instruction specifying a reason for abort Christian Jacobi, Marcel Mitran, Timothy J. Slegel 2018-06-12
9996349 Clearing specified blocks of main storage Anthony F. Coneski, Beth A. Glendening, Peter G. Sutton, Scott B. Tuttle, Elpida Tzortzatos 2018-06-12
9983881 Selectively controlling instruction execution in transactional processing Christian Jacobi, Robert R. Rogers, Timothy J. Slegel 2018-05-29
9983882 Selectively controlling instruction execution in transactional processing Christian Jacobi, Robert R. Rogers, Timothy J. Slegel 2018-05-29
9983883 Transaction abort instruction specifying a reason for abort Christian Jacobi, Marcel Mitran, Timothy J. Slegel 2018-05-29
9934159 Dynamic address translation with fetch protection in an emulated environment Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel +1 more 2018-04-03
9921872 Interprocessor memory status communication Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel 2018-03-20
9921849 Address expansion and contraction in a multithreading computer system Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more 2018-03-20
9921848 Address expansion and contraction in a multithreading computer system Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more 2018-03-20
9921834 Prefetching of discontiguous storage locations in anticipation of transactional execution Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Eric M. Schwarz +1 more 2018-03-20
9904572 Dynamic prediction of hardware transaction resource requirements Fadi Y. Busaba, Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum 2018-02-27
9898290 Efficiency for coordinated start interpretive execution exit for a multithreaded processor Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more 2018-02-20
9898289 Coordinated start interpretive execution exit for a multithreaded processor Jonathan D. Bradbury, Fadi Y. Busaba, Mark S. Farrell, Charles W. Gainey, Jr., Lisa C. Heller +4 more 2018-02-20
9886392 Selective purging of PCI I/O address translation buffer David F. Craddock, Thomas A. Gregg, Damian L. Osisek 2018-02-06
9886391 Selective purging of PCI I/O address translation buffer David F. Craddock, Thomas A. Gregg, Damian L. Osisek 2018-02-06
9880942 Selective purging of PCI I/O address translation buffer David F. Craddock, Thomas A. Gregg, Damian L. Osisek 2018-01-30