TK

Tsz-Mei Kwok

TSMC: 14 patents #88 of 2,832Top 4%
Overall (2017): #3,266 of 506,227Top 1%
14
Patents 2017

Issued Patents 2017

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
9853155 MOS devices having epitaxy regions with reduced facets Chii-Horng Li, Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee 2017-12-26
9847225 Semiconductor device and method of manufacturing the same Chun-Fai Cheng, An-Shen Chang, Hui-Min Lin, Hsien-Ching Lo 2017-12-19
9842910 Methods for manufacturing devices with source/drain structures Hsueh-Chang Sung, Kuan-Yu Chen, Hsien-Hsin Lin 2017-12-12
9825036 Structure and method for semiconductor device Yi-Jing Lee, Ming-Hua Yu 2017-11-21
9806171 Method for making source and drain regions of a MOSFET with embedded germanium-containing layers having different germanium concentration Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee 2017-10-31
9768178 Semiconductor device, static random access memory cell and manufacturing method of semiconductor device Yi-Jing Lee, Ming-Hua Yu, Kun-Mu Li 2017-09-19
9755077 Source and drain stressors with recessed top surfaces Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee 2017-09-05
9698243 Transistor strain-inducing scheme Hsueh-Chang Sung, Kun-Mu Li, Chii-Horng Li, Tze-Liang Lee 2017-07-04
9691898 Germanium profile for channel strain Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee, Chii-Horng Li 2017-06-27
9666691 Epitaxy profile engineering for FinFETs Chien-Chang Su, Hsien-Hsin Lin, Hsueh-Chang Sung, Yi-Fang Pai, Kuan-Yu Chen 2017-05-30
9666686 MOS devices having epitaxy regions with reduced facets Chii-Horng Li, Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee 2017-05-30
9601574 V-shaped epitaxially formed semiconductor layer Ming-Hua Yu, Chii-Horng Li 2017-03-21
9601619 MOS devices with non-uniform P-type impurity profile Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee, Chii-Horng Li 2017-03-21
9583483 Source and drain stressors with recessed top surfaces Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee 2017-02-28