Issued Patents 2017
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853155 | MOS devices having epitaxy regions with reduced facets | Chii-Horng Li, Hsueh-Chang Sung, Tze-Liang Lee, Tsz-Mei Kwok | 2017-12-26 |
| 9825113 | Double-sided display substrate and manufacturing method thereof and display device | — | 2017-11-21 |
| 9806171 | Method for making source and drain regions of a MOSFET with embedded germanium-containing layers having different germanium concentration | Tsz-Mei Kwok, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2017-10-31 |
| 9768178 | Semiconductor device, static random access memory cell and manufacturing method of semiconductor device | Yi-Jing Lee, Tsz-Mei Kwok, Ming-Hua Yu | 2017-09-19 |
| 9768302 | Semiconductor structure and fabricating method thereof | Hsueh-Chang Sung, Chih-Chiang Chang | 2017-09-19 |
| 9755077 | Source and drain stressors with recessed top surfaces | Tsz-Mei Kwok, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2017-09-05 |
| 9698243 | Transistor strain-inducing scheme | Tsz-Mei Kwok, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2017-07-04 |
| 9691898 | Germanium profile for channel strain | Hsueh-Chang Sung, Tsz-Mei Kwok, Tze-Liang Lee, Chii-Horng Li | 2017-06-27 |
| 9666686 | MOS devices having epitaxy regions with reduced facets | Chii-Horng Li, Hsueh-Chang Sung, Tze-Liang Lee, Tsz-Mei Kwok | 2017-05-30 |
| 9664936 | Display panel motherboard, display panel, manufacturing method thereof and display device | Ni Jiang, Xi Xiang, Yuanming Feng | 2017-05-30 |
| 9601619 | MOS devices with non-uniform P-type impurity profile | Hsueh-Chang Sung, Tsz-Mei Kwok, Tze-Liang Lee, Chii-Horng Li | 2017-03-21 |
| 9583483 | Source and drain stressors with recessed top surfaces | Tsz-Mei Kwok, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2017-02-28 |