Issued Patents 2017
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853101 | Strained nanowire CMOS device and method of forming | Hung-Li Chiang, Yu-Lin Yang, Chih Chieh Yeh, Yee-Chia Yeo, Chi-Wen Liu | 2017-12-26 |
| 9768301 | Short channel effect suppression | Chia-Cheng Ho, Chih-Sheng Chang, Yee-Chia Yeo, Yu-Lin Yang | 2017-09-19 |
| 9741829 | Semiconductor device and manufacturing method thereof | Chih Chieh Yeh, Chih-Sheng Chang, Hung-Li Chiang, Hung-Ming Chen, Yee-Chia Yeo | 2017-08-22 |
| 9728461 | Method of forming semiconductor device with different threshold voltages | Chia-Cheng Ho, Chih Chieh Yeh, Tsung-Lin Lee, Yu-Lin Yang | 2017-08-08 |
| 9716146 | Integrated circuit structure and method with solid phase diffusion | Ling-Yen Yeh, Chi-Wen Liu, Chih-Sheng Chang, Yee-Chia Yeo | 2017-07-25 |
| 9659826 | Asymmetric source/drain depths | Yu-Lin Yang, Chia-Cheng Ho, Jung-Piao Chiu, Tsung-Lin Lee, Chih Chieh Yeh +2 more | 2017-05-23 |
| 9660025 | Structure and formation method of semiconductor device structure | Chih Chieh Yeh, Hung-Li Chiang, Hung-Ming Chen, Yee-Chia Yeo | 2017-05-23 |
| 9647071 | FINFET structures and methods of forming the same | Chih Chieh Yeh, Tsung-Lin Lee | 2017-05-09 |
| 9646994 | Semiconductor devices and manufacturing methods thereof | Chee-Wee Liu, Hung-Chih Chang, Chih-Sheng Chang | 2017-05-09 |
| 9627531 | Field-effect transistor with dual vertical gates | Hung-Li Chiang, Chih Chieh Yeh, Tzu-Chiang Chen, Yee-Chia Yeo | 2017-04-18 |
| 9583490 | Inverters and manufacturing methods thereof | — | 2017-02-28 |
| 9577071 | Method of making a strained structure of a semiconductor device | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan, Clement Hsingjen Wann | 2017-02-21 |
| 9570580 | Replacement gate process for FinFET | Hung-Li Chiang, Tsung-Yao Wen, Yee-Chia Yeo, Yen-Ming Chen | 2017-02-14 |