Issued Patents 2017
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853101 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Hung-Li Chiang, Chih Chieh Yeh, Yee-Chia Yeo, Chi-Wen Liu | 2017-12-26 |
| 9768301 | Short channel effect suppression | Cheng-Yi Peng, Chia-Cheng Ho, Chih-Sheng Chang, Yee-Chia Yeo | 2017-09-19 |
| 9728461 | Method of forming semiconductor device with different threshold voltages | Cheng-Yi Peng, Chia-Cheng Ho, Chih Chieh Yeh, Tsung-Lin Lee | 2017-08-08 |
| 9659826 | Asymmetric source/drain depths | Cheng-Yi Peng, Chia-Cheng Ho, Jung-Piao Chiu, Tsung-Lin Lee, Chih Chieh Yeh +2 more | 2017-05-23 |