Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9818693 | Through-memory-level via structures for a three-dimensional memory device | Fumiaki Toyama, Hiroyuki Ogawa, Yoko Furihata, James Kai, Jixin Yu +2 more | 2017-11-14 |
| 9806093 | Through-memory-level via structures for a three-dimensional memory device | Fumiaki Toyama, Hiroyuki Ogawa | 2017-10-31 |
| 9768186 | Three dimensional memory device having well contact pillar and method of making thereof | Seiji Shimabukuro, Ryoichi Honma, Hiroyuki Ogawa, Fumiaki Toyama | 2017-09-19 |
| 9646981 | Passive devices for integration with three-dimensional memory devices | Masatoshi Nishikawa, Ryoichi Honma, Toru Miwa, Masahide Matsumoto, Hiroaki Koketsu | 2017-05-09 |
| 9613975 | Bridge line structure for bit line connection in a three-dimensional semiconductor device | Chenche Huang, Chun-Ming Wang, Hiroaki Koketsu, Masayuki Hiroi, Masaaki Higashitani | 2017-04-04 |
| 9595338 | Utilizing NAND strings in dummy blocks for faster bit line precharge | Juan Lee, Hao Thai Nguyen, Man Lung Mui, Tien-Chien Kuo | 2017-03-14 |