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USPTO Patent Rankings Data through Sept 30, 2025
FW

Frederick A. Ware

RARambus: 46 patents #1 of 160Top 1%
Los Altos Hills, CA: #2 of 208 inventorsTop 1%
California: #61 of 60,394 inventorsTop 1%
Overall (2017): #241 of 506,227Top 1%
46 Patents 2017

Issued Patents 2017

Showing 26–46 of 46 patents

Patent #TitleCo-InventorsDate
9697884 Variable width memory module supporting enhanced error detection and correction John Eric Linstadt, Kenneth L. Wright 2017-07-04
9691504 DRAM retention test method for dynamic error correction Ely Tsern, Suresh Rajan, Thomas Vogelsang 2017-06-27
9684623 Memory system with independently adjustable core and interface data rates 2017-06-20
9667359 Periodic calibration for communication channels by drift tracking Craig E. Hampel, Richard E. Perego 2017-05-30
9667406 Communication channel calibration for drift conditions Richard E. Perego, Craig E. Hampel 2017-05-30
9665430 Memory system with error detection and retry modes of operation Ely Tsern, Mark A. Horowitz 2017-05-30
9652176 Memory controller for micro-threaded memory operations Craig E. Hampel, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai 2017-05-16
9653146 High capacity memory system using standard controller component Suresh Rajan, Scott C. Best 2017-05-16
9652409 Memory access during memory calibration Ian Shaeffer 2017-05-16
9645631 Optimizing power in a memory device Dinesh Patil, Amir Amirkhany, Farrukh Aquil, Kambiz Kaviani 2017-05-09
9628257 Communication channel calibration for drift conditions Richard E. Perego, Craig E. Hampel 2017-04-18
9575835 Error correction in a memory device Thomas Vogelsang, Suresh Rajan, Ian Shaeffer, Wayne F. Ellis 2017-02-21
9569393 Memory module threading with staggered data transfers Hongzhong Zheng 2017-02-14
9571231 In-band status encoding and decoding using error correction symbols John Eric Linstadt 2017-02-14
9570196 Testing through-silicon-vias Thomas Vogelsang, William N. Ng 2017-02-14
9570145 Protocol for refresh between a memory controller and a memory device Brent Haukness 2017-02-14
9570126 Memory with deferred fractional row activation James E. Harris, Thomas Vogelsang, Ian Shaeffer 2017-02-14
9569308 Reduced-overhead error detection and correction Brian S. Leibowitz 2017-02-14
9563556 Techniques for storing data and tags in different memory arrays 2017-02-07
9563597 High capacity memory systems with inter-rank skew tolerance Ely Tsern, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more 2017-02-07
9536589 Low-power source-synchronous signaling Jared L. Zerbe 2017-01-03