Issued Patents 2017
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847248 | Method of making a stacked device assembly | Frederick A. Ware, Ian Shaeffer | 2017-12-19 |
| 9843315 | Data transmission using delayed timing signals | Frederick A. Ware, Brian S. Leibowitz, Jared L. Zerbe | 2017-12-12 |
| 9842630 | Memory component with adjustable core-to-interface data rate ratio | Frederick A. Ware | 2017-12-12 |
| 9836348 | Memory repair method and apparatus based on error code tracking | Frederick A. Ware | 2017-12-05 |
| 9824036 | Memory systems with multiple modules supporting simultaneous access responsive to common memory commands | Richard E. Perego, Donald C. Stark, Frederick A. Ware, Craig E. Hampel | 2017-11-21 |
| 9818463 | Memory control component with inter-rank skew tolerance | Frederick A. Ware, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-11-14 |
| 9741424 | Memory controller | Frederick A. Ware, Richard E. Perego, Craig E. Hampel | 2017-08-22 |
| 9721642 | Memory component with pattern register circuitry to provide data patterns for calibration | Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Frederick A. Ware | 2017-08-01 |
| 9691504 | DRAM retention test method for dynamic error correction | Frederick A. Ware, Suresh Rajan, Thomas Vogelsang | 2017-06-27 |
| 9665430 | Memory system with error detection and retry modes of operation | Mark A. Horowitz, Frederick A. Ware | 2017-05-30 |
| 9563583 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Craig E. Hampel | 2017-02-07 |
| 9563597 | High capacity memory systems with inter-rank skew tolerance | Frederick A. Ware, Brian S. Leibowitz, Wayne F. Ellis, Akash Bansal, John Brooks +1 more | 2017-02-07 |