Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9792963 | Managing disturbance induced errors | Prashant S. Damle, Frank T. Hady, Kiran Pangal, Sowmiya Jayachandran | 2017-10-17 | $9,876,000 |
| 9785603 | Devices, systems, and methods of reducing chip select | Doyle Rivers, Anand S. Ramalingam, Rajesh Sundaram, Julie M. Walker | 2017-10-10 | $13,864,000 |
| 9740437 | Mechanism to adapt garbage collection resource allocation in a solid state drive | Neal R. Mielke, Mark Anthony Golez, David J. Pelster, Xin Guo | 2017-08-22 | $8,061,000 |
| 9679658 | Method and apparatus for reducing read latency for a block erasable non-volatile memory | David J. Pelster, Yogesh B. Wakchaure, Xin Guo, Justin R. Dayacap, Joseph Doller +1 more | 2017-06-13 | $8,497,000 |
| 9558831 | Non-volatile memory programming | Violante Moschiano, Giovanni Santin | 2017-01-31 | $12,992,000 |