| 9831272 |
Metal oxide semiconductor cell device architecture with mixed diffusion break isolation trenches |
Venugopal Boynapalli, Satyanarayana Sahu, Hyeokjin Lim, Mukul Gupta |
2017-11-28 |
| 9773866 |
Semiconductor integrated circuits (ICs) employing localized low dielectric constant (low-K) material in inter-layer dielectric (ILD) material for improved speed performance |
Haining Yang |
2017-09-26 |
| 9755618 |
Low-area low clock-power flip-flop |
Seid Hadi Rasouli, Venugopal Boynapalli |
2017-09-05 |
| 9640522 |
V1 and higher layers programmable ECO standard cells |
Satyanarayana Sahu, Vinod Gupta, Triveni Rachapalli |
2017-05-02 |
| 9640480 |
Cross-couple in multi-height sequential cells for uni-directional M1 |
Mukul Gupta, Ohsang Kwon |
2017-05-02 |
| 9634026 |
Standard cell architecture for reduced leakage current and improved decoupling capacitance |
Satyanarayana Sahu, Ramaprasath Vilangudipitchai, Dorav Kumar |
2017-04-25 |
| 9577639 |
Source separated cell |
Satyanarayana Sahu, Venugopal Boynapalli, Hyeokjin Lim, Mukul Gupta, Hananel Kang +2 more |
2017-02-21 |
| 9548251 |
Semiconductor interposer having a cavity for intra-interposer die |
Rezaur Rahman Khan, Sam Ziqun Zhao, Pieter Vorenkamp, Kevin Kunzhong Hu, Sampath K. V. Karikalan |
2017-01-17 |
