| 9785557 |
Translation entry invalidation in a multithreaded data processing system |
Guy L. Guthrie, Cathy May, Derek E. Williams |
2017-10-10 |
| 9772945 |
Translation entry invalidation in a multithreaded data processing system |
Guy L. Guthrie, Cathy May, Derek E. Williams |
2017-09-26 |
| 9747212 |
Virtual unifed instruction and data caches including storing program instructions and memory address in CAM indicated by store instruction containing bit directly indicating self modifying code |
Wen-Tzer T. Chen, Robert H. Bell, Jr. |
2017-08-29 |
| 9626187 |
Transactional memory system supporting unbroken suspended execution |
Harold W. Cain, III, Benjamin Herrenschmidt, Hung Q. Le, Cathy May, Maged M. Michael +4 more |
2017-04-18 |
| 9626256 |
Determining failure context in hardware transactional memories |
Harold W. Cain, III, Hung Q. Le, Cathy May |
2017-04-18 |
| 9619345 |
Apparatus for determining failure context in hardware transactional memories |
Harold W. Cain, III, Hung Q. Le, Cathy May |
2017-04-11 |
| 9600419 |
Selectable address translation mechanisms |
Anthony J. Bybell, Michael K. Gschwind |
2017-03-21 |
| 9575825 |
Push instruction for pushing a message payload from a sending thread to a receiving thread |
Lakshminarayana B. Arimilli, Bernard C. Drerup, Guy L. Guthrie, John D. Irish, William J. Starke +1 more |
2017-02-21 |
| 9569293 |
Push instruction for pushing a message payload from a sending thread to a receiving thread |
Lakshminarayana B. Arimilli, Bernard C. Drerup, Guy L. Guthrie, John D. Irish, William J. Starke +1 more |
2017-02-14 |
