GG

Guy L. Guthrie

IBM: 26 patents #94 of 10,852Top 1%
Overall (2017): #904 of 506,227Top 1%
26
Patents 2017

Issued Patents 2017

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
9830198 Translation entry invalidation in a multithreaded data processing system Hugh Shen, Derek E. Williams 2017-11-28
9824014 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-11-21
9811466 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-11-07
9798577 Transactional storage accesses supporting differing priority levels Hung Q. Le, William J. Starke, Derek E. Williams 2017-10-24
9792208 Techniques for logging addresses of high-availability data via a non-blocking channel Sanjeev Ghai, Hien Minh Le, Hugh Shen, Philip G. Williams 2017-10-17
9792147 Transactional storage accesses supporting differing priority levels Hung Q. Le, William J. Starke, Derek E. Williams 2017-10-17
9785557 Translation entry invalidation in a multithreaded data processing system Bradly G. Frey, Cathy May, Derek E. Williams 2017-10-10
9778933 Non-serialized push instruction for pushing a message payload from a sending thread to a receiving thread Lakshminarayana B. Arimilli, Bernard C. Drerup, John D. Irish, William J. Starke, Jeffrey A. Stuecheli 2017-10-03
9772945 Translation entry invalidation in a multithreaded data processing system Bradly G. Frey, Cathy May, Derek E. Williams 2017-09-26
9766890 Non-serialized push instruction for pushing a message payload from a sending thread to a receiving thread Lakshminarayana B. Arimilli, Bernard C. Drerup, John D. Irish, William J. Starke, Jeffrey A. Stuecheli 2017-09-19
9753862 Hybrid replacement policy in a multilevel cache memory hierarchy Bernard C. Drerup, Jeffrey A. Stuecheli, Phillip G. Williams 2017-09-05
9727488 Counter-based victim selection in a cache memory Bernard C. Drerup, William J. Starke, Jeffrey A. Stuecheli 2017-08-08
9727489 Counter-based victim selection in a cache memory Bernard C. Drerup, William J. Starke, Jeffrey A. Stuecheli 2017-08-08
9715459 Translation entry invalidation in a multithreaded data processing system Hugh Shen, Derek E. Williams 2017-07-25
9710394 Translation entry invalidation in a multithreaded data processing system Hugh Shen, Derek E. Williams 2017-07-18
9665297 Injection of at least a partial cache line in a private multilevel cache hierarchy Luis de la Torre, Bernard C. Drerup, Sanjeev Ghai, Alexander Michael Taft, Derek E. Williams 2017-05-30
9652399 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-05-16
9645937 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-05-09
9632943 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-04-25
9632942 Expedited servicing of store operations in a data processing system Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams 2017-04-25
9619390 Proactive prefetch throttling William J. Starke, Jeffrey A. Stuecheli, Derek E. Williams 2017-04-11
9575921 Command rate configuration in data processing system David J. Krolak, Charles F. Marino, Praveen S. Reddy, Michael S. Siegel 2017-02-21
9575825 Push instruction for pushing a message payload from a sending thread to a receiving thread Lakshminarayana B. Arimilli, Bernard C. Drerup, Bradly G. Frey, John D. Irish, William J. Starke +1 more 2017-02-21
9575815 Translation entry invalidation in a multithreaded data processing system Hugh Shen, Derek E. Williams 2017-02-21
9569293 Push instruction for pushing a message payload from a sending thread to a receiving thread Lakshminarayana B. Arimilli, Bernard C. Drerup, Bradly G. Frey, John D. Irish, William J. Starke +1 more 2017-02-14