Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9786338 | Multiple register memory access instructions, processors, methods, and systems | Glenn J. Hinton, Bret L. Toll | 2017-10-10 |
| 9594648 | Controlling non-redundant execution in a redundant multithreading (RMT) processor | Glenn J. Hinton, Steven Raasch, Sebastien Hily, John G. Holm, Avinash Sodani +1 more | 2017-03-14 |
| 9563564 | Cache allocation with code and data prioritization | Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more | 2017-02-07 |
| 9558127 | Instruction and logic for a cache prefetcher and dataless fill buffer | Stanislav Shwartsman, Robert S. Chappell, Ryan Carlson, Raanan Sade, Omar M. Shaikh +2 more | 2017-01-31 |