Issued Patents 2017
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9823849 | Method and apparatus for dynamically allocating storage resources to compute nodes | Mark A. Schmisseur, Mohan J. Kumar, Balint Fleischer, Debendra Das Sharma | 2017-11-21 |
| 9817738 | Clearing poison status on read accesses to volatile memory regions allocated in non-volatile memory | Camille C. Raad, Richard P. Mangold, Theodros Yigzaw | 2017-11-14 |
| 9690493 | Two-level system main memory | Eric J. Dahlen, Glenn J. Hinton | 2017-06-27 |
| 9626321 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Robert Beers +18 more | 2017-04-18 |
| 9619408 | Memory channel that supports near memory and far memory access | Bill Nale, Muthukumar P. Swaminathan, Tessil Thomas, Taarinya Polepeddi | 2017-04-11 |
| 9600416 | Apparatus and method for implementing a multi-level memory hierarchy | Rajat Agarwal, Kai Cheng, Taarinya Polepeddi, Camille C. Raad, David J. Zimmerman +5 more | 2017-03-21 |