Issued Patents 2017
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9703712 | Satisfying memory ordering requirements between partial reads and non-snoop accesses | Ching-Tsun Chou, Robert J. Safranek, James Vash | 2017-07-11 |
| 9626321 | High performance interconnect | Robert J. Safranek, Robert G. Blankenship, Venkatraman Iyer, Jeff Willey, Darren S. Jue +18 more | 2017-04-18 |