Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9785433 | Three source operand floating-point addition instruction with operand negation bits and intermediate and final result rounding | Roger Espasa, Guillem Sole | 2017-10-10 |
| 9733935 | Super multiply add (super madd) instruction | Jesus Corbal, Andrew T. Forsyth, Roger Espasa, Thomas D. Fletcher | 2017-08-15 |