Issued Patents 2017
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9792115 | Super multiply add (super MADD) instructions with three scalar terms | Andrew T. Forsyth, Thomas D. Fletcher, Lisa K. Wu, Eric Sprangle | 2017-10-17 |
| 9766886 | Instruction and logic to provide vector linear interpolation functionality | Andrew T. Forsyth, Lisa K. Wu, Thomas D. Fletcher | 2017-09-19 |
| 9733935 | Super multiply add (super madd) instruction | Andrew T. Forsyth, Roger Espasa, Manel Fernandez, Thomas D. Fletcher | 2017-08-15 |
| 9715432 | Memory fault suppression via re-execution and hardware FSM | Ramon Matas, Roger Gramunt, Chung-Lun Chan, Benjamin Crawford Chaffin, Aditya Kesiraju +1 more | 2017-07-25 |
| 9665368 | Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register | Christopher J. Hughes, Mark J. Charney, Milind B. Girkar, Elmoustapha Ould-Ahmed_Vall, Bret L. Toll +1 more | 2017-05-30 |
| 9658850 | Apparatus and method of improved permute instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Bret L. Toll, Mark J. Charney, Zeev Sperber +1 more | 2017-05-23 |
| 9632980 | Apparatus and method of mask permute instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Suleyman Sair | 2017-04-25 |
| 9619236 | Apparatus and method of improved insert instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Bret L. Toll, Mark J. Charney, Zeev Sperber +1 more | 2017-04-11 |
| 9606847 | Enabling error detecting and reporting in machine check architecture | Dennis R. Bradford, Rohan Sharma | 2017-03-28 |
| 9588764 | Apparatus and method of improved extract instructions | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Bret L. Toll, Mark J. Charney, Zeev Sperber +1 more | 2017-03-07 |