Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 9721903 | Vertical interconnects for self shielded system in package (SiP) modules | Meng Chi Lee, Shakti Singh Chauhan, Jun Chung Hsu, Tha-An Lin | 2017-08-01 | $97,661,000 |
| 9679801 | Dual molded stack TSV package | Kwan-Yu Lai, Jun Zhai, Kunzhong Hu | 2017-06-13 | $53,900,000 |
| 9589936 | 3D integration of fanout wafer level packages | Jun Zhai, Kunzhong Hu | 2017-03-07 | $87,942,000 |