Issued Patents 2016
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9525026 | Method of forming an epitaxial semiconductor layer in a recess and a semiconductor device having the same | Chun Hsiung Tsai | 2016-12-20 |
| 9515187 | Controlling the shape of source/drain regions in FinFETs | Chien-Chang Su, Kuan-Yu Chen, Hsueh-Chang Sung, Hsien-Hsin Lin | 2016-12-06 |
| 9496149 | Semiconductor devices and methods for manufacturing the same | Chun Hsiung Tsai | 2016-11-15 |
| 9373695 | Method for improving selectivity of epi process | Kuan-Yu Chen, Hsien-Hsin Lin, Chun-Feng Nieh, Hsueh-Chang Sung, Chien-Chang Su | 2016-06-21 |
| 9362360 | Modulating germanium percentage in MOS devices | Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2016-06-07 |
| 9356150 | Method for incorporating impurity element in EPI silicon process | Chien-Chang Su, Hsien-Hsin Lin, Kuan-Yu Chen, Hsueh-Chang Sung, Yi-Fang Pai | 2016-05-31 |
| 9337337 | MOS device having source and drain regions with embedded germanium-containing diffusion barrier | Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li, Tze-Liang Lee | 2016-05-10 |
| 9287398 | Transistor strain-inducing scheme | Hsueh-Chang Sung, Kun-Mu Li, Chii-Horng Li, Tze-Liang Lee | 2016-03-15 |