Issued Patents 2016
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9476927 | Structure and method to determine through silicon via build integrity | Chandrasekharan Kothandaraman, Conal E. Murray | 2016-10-25 |
| 9263324 | 3-D integration using multi stage vias | Mukta G. Farooq | 2016-02-16 |
| 9257336 | Bottom-up plating of through-substrate vias | Mukta G. Farooq, John A. Fitzsimmons | 2016-02-09 |
| 9252133 | Electrical leakage reduction in stacked integrated circuits having through-silicon-via (TSV) structures | Christopher N. Collins, Mukta G. Farooq, Joyce C. Liu, Gerd Pfeiffer, Thuy L. Tran-Quinn | 2016-02-02 |